This invention relates to etching of electrode in integrated circuits, and specifically to a method of plasma etching an iridiumxe2x80x94tantalumxe2x80x94oxide electrode in a ferroelectric integrated circuit, and a method for cleaning the etching debris.
Electrodes used in ferroelectric devices are usually formed from platinum or iridium, and are generally etched using ion milling or chlorine-based chemistries. Etching is usually preceded by physical sputtering, but occasionally may be preceded by plasma-assisted chemical etching. Such processes result in a low etching rate, poor selectivity in that the etching removes materials not intended to be removed, and re-deposition of etch-removed materials. Poor sidewall profiles are also frequent occurrences.
A method of forming an electrode in an integrated circuit includes preparing a silicon-base substrate, including forming semiconductor structures on the substrate to form an integrated substrate structure; depositing a layer of electrode material on a substrate structure; patterning the layer of electrode material to form electrode elements, wherein said patterning includes plasma etching the layer of electrode material in a plasma reactor in an etching gas atmosphere having a fluorine component therein; and cleaning the substrate structure and electrode elements in a distilled water bath.
It is an object of the invention to provide accurate patterning of Ir-Ta-O electrodes.
Another object of the invention is to provide a method of rapid etching of an electrode in a ferroelectric device.
A further object of the invention is to provide a reliable manufacturing process for Ir-Ta-O electrodes when used with ferroelectric devices.
Another object of the invention is to provide a method for removing etching debris from the structure.
This summary and objectives of the invention are provided to enable quick comprehension of the nature of the invention. A more thorough understanding of the invention may be obtained by reference to the following detailed description of the preferred embodiment of the invention in connection with the drawings.